1. Field of the Invention
The present invention relates, in general, to a semiconductor and method for manufacturing the same and, more particularly, to a semiconductor that is thin and has a satisfactory heat dissipation capacity and method for manufacturing the same.
2. Description of the Prior Art
Currently, semiconductor packages, such as Ball Grid Array (xe2x80x9cBGAxe2x80x9d) semiconductor packages Chip Scale semiconductor packages, and micro ball grid array semiconductor packages, are being miniaturized.
In addition, semiconductor chips in such packages are increasing in performance, function, and operation frequency. Consequently, the semiconductor chips generate more heat.
Of such semiconductor packages, a conventional BGA semiconductor package is illustrated in FIG. 14.
The BGA semiconductor package generally comprises a semiconductor chip 1xe2x80x2, on which input and output pads are formed, and a circuit board 10xe2x80x2 onto which the semiconductor chip 1xe2x80x2 is bonded at the center of the circuit board 10xe2x80x2 by means of a bonding agent 3xe2x80x2.
The circuit board 10xe2x80x2 comprises a film 15xe2x80x2, upper circuit patterns 12axe2x80x2 and lower circuit patterns 12bxe2x80x2. The upper circuit patterns 12axe2x80x2 include bond fingers 11xe2x80x2 and are formed on the outer area of the upper surface of the film 15xe2x80x2. The lower circuit patterns 12bxe2x80x2 include a plurality of ball lands 13xe2x80x2 and are formed on the lower surface of the film 15xe2x80x2. The bond fingers 11xe2x80x2 and ball lands 13xe2x80x2 are conductive thin films made of copper (Cu) or the like. The upper and lower circuit patterns are connected to each other by conductive via holes 14xe2x80x2. The upper and lower surfaces of the circuit board 10xe2x80x2, except for the bond fingers 11xe2x80x2 and the ball lands 13xe2x80x2, are coated with a cover coat 16xe2x80x2 so as to protect the circuit patterns from the external environment.
The input and output pads 2xe2x80x2 of the semiconductor chip 1xe2x80x2 are connected with the bond fingers 11xe2x80x2 formed on the upper surface of the circuit board 10xe2x80x2 through a conductive wire 4xe2x80x2. The upper surface of the circuit board 10xe2x80x2, the chip 1xe2x80x2 and the conductive wire 4xe2x80x2 are covered with an encapsulating material 20xe2x80x2 so as to protect the chip 1xe2x80x2 and the conductive wires 4xe2x80x2.
A plurality of conductive balls 40xe2x80x2 are fusion-welded on the ball lands 13xe2x80x2. The semiconductor package 100xe2x80x2 is mounted to a motherboard (not shown), with the conductive balls 40xe2x80x2 being fusion welded on metallizations of the motherboard, so that electric signals may be mediated between the semiconductor chip 1xe2x80x2 and the motherboard by the conductive balls 40xe2x80x2.
In the BGA semiconductor package having the construction described above, the semiconductor chip 1xe2x80x2 exchanges electric signals with the motherboard through the input and output pads 2xe2x80x2, the conductive wire 4xe2x80x2, the bond fingers 11xe2x80x2, the via holes 14xe2x80x2, the ball lands 13xe2x80x2 and the conductive balls 40xe2x80x2.
However, according to the conventional semiconductor package, a semiconductor chip 1xe2x80x2 is bonded on the upper surface of a relatively thick circuit board 10xe2x80x2, thereby increasing a total thickness of the entire semiconductor package. This contrasts with the current trend toward miniaturization of packages, and so the package may not be fit for use in the latest mobile phones, cellular phones, radio pagers, and notebook computers.
In addition, the conventional semiconductor package does not provide means for dissipating heat. Such heat may lead to performance reduction and/or breakdown of the semiconductor package or a device employing the semiconductor package. Although another semiconductor package employing a heat spreader has been disclosed, this semiconductor package generates other problems, in that the thickness of this package is increased due to the addition of the heat spreader. Moreover, the manufacturing cost of such a package is expensive.
Accordingly, the present invention has been made keeping in mind the above problems occurring in the prior art, and an object of the present invention is to provide a semiconductor package and method for manufacturing the same, capable of reducing the thickness of the semiconductor package considerably.
Another object of the present invention is to provide a semiconductor package and method for manufacturing the same, capable of dissipating heat to the outside environment easily and effectively.
A further object of the present invention is to provide a semiconductor and method for manufacturing the same, capable of preventing a circuit board on which circuit patterns are formed, from being bent.
In order to accomplish the above objects and others, one embodiment of the present invention provides a semiconductor package that includes semiconductor chip having a first surface and a second surface, wherein a plurality of input and output pads are formed on one of the first and second surfaces; a circuit board comprising a thin film having a first surface, an opposite second surface, and a center hole in which the semiconductor chip is positioned; a plurality of circuit patterns on the first surface of the thin film, including a plurality of bond fingers and ball lands; a cover coat covering the circuit board except for the bond fingers and the ball lands; electrical conductors that electrically connect the input and output pads of the semiconductor chip with the bond fingers of the circuit board; an encapsulation material covering the semiconductor, the electrical conductors, and a portion of the circuit board; and, a plurality of conductive balls that are fusion-welded onto the ball lands of the circuit board.
The package may further comprise a heat spreader bonded on the second surface of the film.
The second surface of the semiconductor chip, one surface of the heat spreader and one surface of the encapsulation material may lie on the same plane.
The second surface of the semiconductor chip, the second surface of the film and one surface of the encapsulation material may lie on the same plane.
The second surface of the semiconductor chip and one surface of the encapsulation material may lie on the same plane.
The second surface of the film may be entirely covered with the film.
The second surface of the film may be partially covered with the film.
The input and output pads may be formed on the first surface of the semiconductor chip.
The input and output pads may be formed on the second surface of the semiconductor chip.
The first surface of the semiconductor chip and one surface of the encapsulation material may lie on the same plane.
In addition, the present invention provides a method of manufacturing a semiconductor package. One embodiment of such a method includes providing a circuit board, the circuit board having a film, circuit patterns and a plurality of holes, the film having a first surface and a second surface, the circuit patterns including a plurality of bond fingers and ball lands formed on one of the first and second surfaces; respectively positioning a plurality of semiconductor chips in the holes of the circuit board, each of the semiconductor chips having a first surface and a second surface, a plurality of input and output pads being formed on one of the first and second surfaces of semiconductor chips; electrically connecting the input and output pads of each semiconductor chip with the bond fingers of the respective circuit board; covering the semiconductor chips, connection means and a certain area of the circuit board with an encapsulation material; and forming input and output pads by respectively fusion-welding conductive balls on ball lands of the circuit board.
The circuit board may comprise a film, a plurality of circuit patterns and a cover coat, the film having a first surface and a second surface. The circuit board may be in the form of a main strip that consists of a plurality of sub-strips in a row with one or more multiple main slots being interposed between two adjacent sub-strips, each of the sub-strips having a plurality of regularly spaced holes in multiple rows, with each of the holes being surrounded by multiple sub-slots, the circuit patterns including a plurality of bond fingers and ball lands that are formed on the second surface of the film between the holes and the sub-slots, and the cover coat being coated on a surface of the film with the bond fingers and the ball lands of the circuit patterns being exposed to the outside.
The circuit board may comprise a film, a plurality of circuit patterns and a cover coat, the film having a first surface and a second surface and being in the form of a strip that has a plurality of regularly spaced holes in multiple rows with each of the holes being surrounded by multiple slots, the circuit patterns including a plurality of bond fingers and ball lands that are formed on the second surface of the film between the holes and the slots, and the cover coat being coated on a surface of the film with the bond fingers and the ball lands of the circuit patterns being exposed to the outside.
The method may further comprise the step of bonding a hole closing member on the second surface of the circuit board before the step of positioning the semiconductor chips in the holes of the circuit board.
The method may further comprise the step of bonding a hole closing member on the entire second surface of the main strip before the step of positioning the semiconductor chips in the holes of the circuit board.
The method may further comprise the step of bonding a hole closing member on the entire second surface of the strip before the step of positioning the semiconductor chips in the holes of the circuit board.
The hole closing member may consist of a plurality of hole closing member pieces, the hole closing member pieces being respectively bonded on the sub-strips, one side portion of each of the hole closing member pieces being positioned over each of the main slots.
The hole closing member may be provided with a plurality of hole lines at positions that are situated over the main slots.
The method may further comprise the step of separating one side portion of the hole closing member by rendering a plate-shaped bar to pass through the main slot in a direction from the second surface of the circuit board to the first surface of the circuit board, before or after the step of forming input and output pads by respectively fusion-welding conductive balls on ball lands of the circuit board.
The method may further comprise the step of removing the hole closing member, after the step of forming input and output pads by respectively fusion-welding conductive balls on ball lands of the circuit board.
The hole closing member may be an insulating or ultraviolet tape.
The step of encapsulating may be performed by means of a molding die in which the semiconductor chip can be positioned, the molding die being provided with a gate at a position that a portion of the semiconductor chip, on a which input and output pads are formed, faces.